QUATECH, INC.

SCB-1020

Card Type          Serial controller
Chipset/Controller NEC
I/O Options        Serial port
Maximum DRAM       N/A

[Image]

                 CONNECTIONS

        Purpose               Location

  Serial port - DB-25           CN1

                           INTERRUPT SELECT - J1

   Setting     Jumper    Jumper    Jumper     Jumper    Jumper   Jumper F
                 A         B         C          D         E

  »   IRQ4     open       open     closed     open      open       open

      IRQ2    closed      open      open      open      open       open

      IRQ3     open      closed     open      open      open       open

      IRQ5     open       open      open     closed     open       open

      IRQ6     open       open      open      open     closed      open

      IRQ7     open       open      open      open      open      closed

                                    DMA SELECT - J2

      DMA          A        B        C        D        E        F        G        H

  »   CH 1 for   closed    open    closed    open    open     open     open     open
      transmit

  »   CH 3 for    open     open     open     open    open     closed   open     closed
      receive

       CH3 for    open    closed    open     open    open     closed   open     closed
      transmit

       CH1 for   closed    open     open     open    open     open     closed   open
      receive

       CH1 for   closed    open     open     open    closed   open     open     open
      transmit
         and
      receive

       CH3 for    open     open     open    closed   open     open     open     closed
      transmit
         and
      receive

                              INTERRUPT MODE

                 Setting                                 J3

  »           Use dedicated IRQ                  pins 1 & 4 closed

       Share IRQ with compatible Quatech      pins 2 & 5, 3 & 6 closed
                     card

                              CHASSIS GROUND

                 Setting                                 J4

  »       Chassis ground connected to            pins 1 & 8 closed
                digital ground

          Chassis ground provided by              pins 1 & 8 open
               computer chassis

                              DTE/DCE SELECT

                 Setting                                J4

  »           DTE configuration            pins 2 & 9, 3 & 10, 4 & 11, 5
                                            & 12, 6 & 13, 7 & 14 closed

              DCE configuration            pins 2 & 3, 4 & 5, 6 & 7, 9 &
                                            10, 11 & 12, 13 & 14 closed

      [Image]                              [Image]

                             INTERRUPT SOURCE

                  Setting                                 J5

  »      From communications controller           pins 1 & 2 closed

            From DMA terminal count               pins 5 & 6 closed

                               RTS/CTS MODE

                 Setting                                 J5

  »        RTS/CTS connected to CN1           pins 3 & 4, 7 & 8 closed

           RTS/CTS loopback enabled              pins 3 & 7 closed

                           TRANSMIT CLOCK SOURCE

                 Source                                 J6

  »               Internal                       pins 2 & 3 closed

                  External                       pins 1 & 2 closed

                           RECEIVE CLOCK SOURCE

                 Source                                 J7

  »               Internal                       pins 2 & 3 closed

                  External                       pins 1 & 2 closed

                             -SYNC/IPS SELECT

                     Source                                 J8

  »       Intenal synchronization mode sync          pins 2 & 3 closed
             notification signal enabled

         External synchronization mode - sync        pins 1 & 2 closed
             notification signal enabled

         Asynchronous mode - general purpose         pins 1 & 2 closed
                   signal enabled

                 SYNCHRONOUS BLOCK TRANSFER COMPATIBILITY

                 Setting                                 J9

  »   Block Transfer software compatible         pins 1 & 2 closed

           Quatech REV A compatible              pins 2 & 3 closed

  Note:The location of jumper J9 is not specified in manufacturer’s
  documentation.

                        I/O ADDRESS CONFIGURATION

          Base Address                             SW1

  »             210h                        2, 3, 4, 5 & 7 on

                0F0h                           1, 2 & 7 on

            Note (1): The address range for the SCB-1020 is from 0 to
            3F8h. The switches are a binary representation of the
            addresses. When a switch is off, the corresponding bit is set
            to 1 and has the following decimal value: SW1/1=2, SW1/2=1,
            SW1/3=8, SW1/4=4, SW1/5=2, SW1/6=1, SW1/7=8. SW1/8 is not
            used and the factory setting should not be altered. The
            SCB-1020 requires 8 consecutive address locations.